A processor may include one or more processing cores, caches, and cache controllers. The cache controllers are circuit logic used to manage caches for read and write operations directed to a main memory. Caches may include different types of caches including L1, L2, and L3 caches. An L1 cache is a cache dedicated to a specific processing core. An L2 cache is a cache shared by several cores in a multi-core processor. Further, multiple multi-core processors may share a common L3 cache. Each cache may include one or more cache entries to store local copies of data maintained in the main memory and the main memory addresses of the data. The cache controller of the processor may manage operations on L1, L2, and L3 caches according to a cache coherence protocol. The cache coherency protocol ensures consistency of data stored in multiple caches and the main memory.